High-speed data converters such as analog to digital converters (ADCs) and digital to analog converters (DACs) are the building blocks bridging analog and digital domains.
High speed ADC and DAC system often employ an architecture which decomposes the desired signal into N phases. Such a decomposition allows a converter to run at an overall clock frequency Fc where each phase runs at a reduced frequency of Fclk/N. Each of the N phases are appropriately interleaved to construct the desired fall rate (Fcsignal.
When multiple devices are used in a system, there is commonly a need to synchronize the multiple devices so that at any given time each device is operating at the same phase. Each of the devices may be separated by a significant distance, for example, 10 feet. Sending a synchronization signal to all devices is a possible solution, but suffers from transport delay effects.
What is needed is a way to synchronize multiple-phase data converters.